Nondestructive read, two-switch, single-charge-storage...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S187000

Reexamination Certificate

active

06982897

ABSTRACT:
A random access memory (RAM) circuit is coupled to a write control line, a read control line, and one or more bitlines, and includes a write switch having a control terminal and first and second terminals. The first terminal of the write switch is coupled to the one or more bitlines, and the control terminal of the write switch is coupled to the write control line. The circuit includes a charge-storage device having first and second terminals, wherein a first terminal of the charge-storage device is coupled to the second terminal of the write switch and a second terminal of the charge-storage device is coupled to the read control line. The circuit includes a read switch having a control terminal and first and second terminals. The control terminal of the read switch is coupled to the first terminal of the charge-storage device and is coupled to the second terminal of the write switch. The first terminal of the read switch is coupled to the one or more bitlines, and the second terminal of the read switch coupled to ground. The circuit may be implemented through a number of disclosed semiconductor memory devices.

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Karp et al., “A 4096-Bit Dynamica MOS RAM,” ISSCC 72, pp. 10-11, (1972).

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