Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor
Reexamination Certificate
1995-10-06
2002-11-19
Gallagher, John J. (Department: 1733)
Adhesive bonding and miscellaneous chemical manufacture
Methods
Surface bonding and/or assembly therefor
C156S315000, C156S330000, C428S414000, C523S455000, C525S524000
Reexamination Certificate
active
06482289
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates, in general, to a nonconductive laminant and its use to couple two substrates, and more particularly, a nonconductive laminate that is compatible with a conductive paste used to couple two substrates.
In the semiconductor processing area, flip-chip packaging uses a conductive bump or post formed on a semiconductor device to be electrically coupled to another conductive bump or pad of a substrate. This is in contrast to a wire bonded device where the device is mounted on to a substrate and wires are used to electrically couple the semiconductor device with a substrate. Flip-chip electronic products are faster, smaller, and sometimes more reliable than wire bonded electronic products.
The flip chip semiconductor device must be encapsulated to protect it from moisture and contamination, as well as improving the structural integrity of the finished device. One method of encapsulation includes depositing an underfill material between the semiconductor device and the substrate after the semiconductor device and the substrate have been coupled. Underfill processes have disadvantages because the underfill material must be of the right viscosity to completely fill the underside of the chip.
Another method of encapsulation used in the past is a glob top or overmold process, which entails dispensing a glob of material over the flip or wire bonded chip after the semiconductor device and the substrate have been coupled. In flip chip applications, the glob top material is often used in conjunction with an underfill material.
An additional disadvantage of the above encapsulating processes is that the underfill material or glob top material must be cured after encapsulation. This curing step can be a time consuming process which can introduce unnecessary stress to the semiconductor device due to the exposure to high temperatures. Another disadvantage of the above encapsulating processes is that a gap between the semiconductor device and the substrate must be large enough for the material to fill the gap by capillary action. A large gap is undesirable because it increases the thickness of the finished electronic product.
Accordingly, a need exists for developing an improved method and/or material for coupling two substrates, which does not stress the device as much and can be fabricated in a shorter cycle time, thus reducing cost and producing more robust products. It would also be desirable to reduce the size of the gap between the semiconductor device and the substrate in order to manufacture thin electronic products that may be used in smart card applications.
REFERENCES:
patent: 3476702 (1969-11-01), Yamamoto et al.
patent: 4749120 (1988-06-01), Hatada
patent: 5232532 (1993-08-01), Hori
Fang Treliant
Grupen-Shemansky Melissa E.
Kuo Shun-Meen
Gallagher John J.
Hightower Robert F.
Jackson Miriam
Motorola Inc.
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