Non-volatile split gate EPROM memory cell and self-aligned field

Details Non-volatile split gate EPROM memory cell and self-aligned field Non-volatile split gate EPROM memory cell and self-aligned field

1990-12-19

1993-08-31

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

365185, 365 51, 257314, G11C 1140

Patent

active

052414990

ABSTRACT:
The cell comprises a substrate with diffusions of source and drain separated by a channel area a floating gate superimposed over a first part of said channel area and a control gate formed by a first and a second polysilicon strip, respectively, a cell gate oxide between said floating gate and said first part of the channel area, a transistor gate oxide between said control gate and a second part of the channel area, an interpoly oxide between said floating gate and said control gate and a layer of dielectric filler. By means of a process which provides for self-aligned etchings of layers of polysilicon and of oxides there is obtained a floating gate and a control gate self-aligned with one another and with the diffusions of source and drain, as well as with the first oxide.

REFERENCES:
patent: 4300212 (1981-11-01), Simko

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