Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2008-10-02
2011-12-06
Landau, Matthew (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S324000, C257SE21679, C257SE29309
Reexamination Certificate
active
08072025
ABSTRACT:
A first lamination part includes: a charge accumulation layer provided on the respective sidewalls of laminated first conductive layers and accumulating charges; and a first semiconductor layer provided in contact with the fourth insulation layer and formed to extend to the lamination direction. A second lamination part includes a second semiconductor layer provided in contact with the first semiconductor layer. A third lamination part includes: a plurality of first contact layers formed in contact with the respective second lamination part, extending to a first direction perpendicular to the lamination direction, and in line with each other along a second direction perpendicular to the first direction; and a plurality of contact plug layers formed in contact with any one of the first contact layers and extending to the lamination direction. The contact plug layers are arranged at different positions relative to each other in the first direction.
REFERENCES:
patent: 2006/0091556 (2006-05-01), Shigeoka
patent: 2007/0158736 (2007-07-01), Arai et al.
patent: 7-202143 (1995-08-01), None
U.S. Appl. No. 12/508,904, filed Jul. 24, 2009, Kamigaichi, et al.
U.S. Appl. No. 12/562,558, filed Sep. 18, 2009, Nishihara.
Arai Fumitaka
Nishihara Kiyohito
Kabushiki Kaisha Toshiba
Landau Matthew
Luke Daniel
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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