Semiconductor device manufacturing: process – Making device array and selectively interconnecting – With electrical circuit layout
Reexamination Certificate
2011-04-19
2011-04-19
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
With electrical circuit layout
C257S314000, C257S329000, C365S185170
Reexamination Certificate
active
07927926
ABSTRACT:
A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprises: a first columnar semiconductor layer extending in a vertical direction to a substrate; a charge accumulation layer formed around the first columnar semiconductor layer via a first insulation layer; and a first conductive layer formed around the charge accumulation layer via a second insulation layer. Each of the first conductive layers is formed to expand in a two-dimensional manner, and air gaps are formed between the first conductive layers located there above and there below.
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Aochi Hideaki
Fukuzumi Yoshiaki
Katsumata Ryota
Kidoh Masaru
Kito Masaru
Fernandes Errol
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Pham Thanh V
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