Static information storage and retrieval – Read/write circuit – Signals
Patent
1982-03-01
1985-03-19
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Signals
365226, G11C 1140
Patent
active
045063508
ABSTRACT:
A non-volatile semiconductor memory system includes a memory cell array having floating gate type MOS transistors, and a boosting circuit for boosting a write voltage applied to the memory system. A distributing circuit is further contained for selectively distributing a boosted voltage from the boosting circuit to at least a part of the memory system, for example, row lines in response to a control signal.
REFERENCES:
patent: 4023148 (1977-05-01), Heuber et al.
patent: 4094012 (1978-06-01), Perlegos et al.
patent: 4405868 (1983-09-01), Lockwood
Gerber et al., "Low Voltage Single Supply CMOS Electrically Erasable Read-Only Memory", IEEE Transactions on Electron Devices, vol. Ed. 27, No. 7, Jul. 1980, pp. 1211-1216.
Capece, "Memories", Electronics, Oct. 25, 1979, (pp. 124-134).
Asano Masamichi
Iwahashi Hiroshi
Popek Joseph A.
Tokyo Shibaura Denki Kabushiki Kaisha
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