Non-volatile semiconductor memory device with magnetic...

Static information storage and retrieval – Read only systems – Magnetic

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S099000, C365S171000, C365S158000, C365S173000, C365S066000, C365S230030

Reexamination Certificate

active

06532163

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device, and more particularly to a magnetic random access memory device having an array of magnetic memory cells.
2. Description of the Related Art
A magnetic random access memory device having an array of magnetic memory cells has been known as one of the non-volatile semiconductor memory devices. The magnetic random access memory device has an array of magnetic memory cells, which is which comprises a magnetoresistance element. The magnetic random access memory device will hereinafter referred to as MRAM device.
FIG. 1A
is a schematic perspective view illustrative of one of conventional magnetoresistance elements serving as magnetic memory cells of the MRAM device.
FIG. 1B
is a schematic perspective view illustrative of read out operation of the magnetoresistance element of FIG.
1
A.
FIG. 1C
is a plan view illustrative of respective magnetization states depending on stored data of the magnetoresistance element of FIG.
1
A.
The single magnetic memory cell comprises a first wiring layer
11
, a pinned layer
12
, a non-magnetic layer
13
, a free layer
14
, and a second wiring layer
12
. The magnetoresistance element comprises the pinned layer
12
, the non-magnetic layer
13
, and the free layer
14
, wherein the non-magnetic layer
13
is sandwiched between the pinned layer
12
and the free layer
14
. The pinned layer
12
is in contact with the first wiring layer
11
. The free layer
14
is in contact with the second wiring layer
12
. The pinned layer
12
and the free layer
14
are made of ferromagnetic materials. The non-magnetic layer
13
is made of an insulating material. The pinned layer
12
has a thickness of about =B
20
=l nanometers. The pinned layer
12
has a fixed magnetization direction. The non-magnetic layer
13
has a thickness of about 1.5 nanonmeters. The free layer
14
has a thickness of about 20 nanometers. The free layer
14
has a freely changeable magnetization direction.
The magnetization direction of the free layer
14
indicates stored data. The free layer
14
serves as a data storage layer. The first wiring layer
11
and the second wiring layer
15
extend in directions perpendicular to each other. The magnetoresistanice element is positioned at a crossing point between the first wiring layer
11
and the second wiring layer
15
. A current
16
flows from the first wiring layer
11
through the pinned layer
12
, the non-magnetic layer
13
and the free layer
14
to the second wiring layer
15
. The magnetic memory cell is capable of storing binary digit data “0” and “1”. If the magnetization directions of the pinned layer
12
and the free layer
14
are parallel to each other, then this means that the magnetic memory cell stores a first one of binary digits, for example, data “0”. If the magnetization directions of the pinned layer
12
and the free layer
14
are anti-parallel to each other, then this means that the magnetic memory cell stores a first one of binary digits, for example, data “1”. The magnetization direction of the free layer
14
is changed depending on an externally applied magnetic field.
An electrical resistance of the non-magnetic layer
13
varies by about 10-40% due to the tunneling magnetoresistance effect between in a first state where the magnetization directions of the pinned layer
12
and the free layer
14
arc parallel to each other and a second state where the magnetization directions of the pinned layer
12
and the free layer
14
are anti-parallel to each other. A predetermined potential difference or a predetermined voltage is given to the first and second wiring layers
11
and
15
to apply a tunneling current from the pinned layer
12
through the non-magnetic layer
13
to the free layer
14
. This tunneling current varies depending on the variable electrical resistance of the non-magnetic layer
13
due to the tunneling magnetoresistance effect. The data can be fetched from the magnetic memory cell by detecting the variation in the tunneling current.
The use of the tunneling magnetoresistance effect for the magnetic memory cell is more advantageous for a highly dense MRAM than a conventional giant magnetoresistance effect because a lead electrode structure of the magnetic memory cell comprising the tunneling magnetoresistance element is more simple than the magnetic memory cell comprising the giant magnetoresistance clement.
FIG. 2A
is a fragmentary schematic perspective view illustrative of an array of magnetic memory cells of the MRAM of FIG.
1
A.
FIG. 2B
is a fragmentary schematic perspective view illustrative of the array of the magnetic memory cells in write operation in FIG.
2
A.
The first wiring layers
11
extend in parallel to each other in a first direction. The second wiring layers
15
extend in parallel to each other in a second direction perpendicular to the first direction. The single first wiring layer
11
and the single second wiring layer
15
has a single crossing point, where a single magnetic memory cell “C” is provided. The plural first wiring layers
11
and the plural second wiring layers
15
have an array of crossing points where plural magnetic memory cells “C” are provided. The first wiring layers
11
serve as word lines. The second wiring layers
15
serve as bit lines. One of the plural magnetic memory cells “C” is selected by selecting one of the word lines and one of the bit lines, for read or write operations to the selected magnetic memory cell “C”.
Japanese laid-open patent publication No. 2000-82791 also discloses another MRAM, wherein magnetic tunneling junction devices are used as magnetic memory cells.
The MRAM has the array of the magnetic memory cells, each of which comprises the tunneling magnetoresistance element utilizing the tunneling magnetoresistance effect, wherein the tunneling magnetoresistance element includes an insulating thin film sandwiched between the at least two ferromagnetic thin films. The tunneling magnetoresistance element is switched between a first state that the magnetization directions of the two ferromagnetic thin films are parallel to each other and a second state that the magnetization directions of the two ferromagnetic thin films are anti-parallel to each other. The resistance of the insulating film, that the tunneling current senses, is different in between the first and second states. These two states correspond to binary digits, for example, the first state corresponds to the data “0” and the second state corresponds to the data “1”.
The write operation is accomplished as follows. One of the word lines
11
and one of the bit lines
15
are selected. A first write current Isw is applied to the selected word line
11
s.
A first magnetic field Msw is generated around the relected word line
11
s.
The first write current Isw has a predetermined current value and a predetermined direction. A second write current Isb is applied to the selected bit line
15
s.
The second write current Isb has a predetermined current value and a predetermined direction. A second magnetic field Msb is generated around the selected bit line
15
s.
As a result, a superimposed magnetic field of both the first and second magnetic field Msw and Msb is applied to the crossing point of the selected word line
11
s
and the selected bit line
15
s.
The selected magnetic memory cell “Cs” is positioned at the crossing point of the selected word line
11
s
and the selected bit line
15
s,
for which reason the selected magnetic memory cell “Cs” is applied with the superimposed magnetic field. The free layer of the selected magnetic memory cell “Cs” is also applied with the superimposed magnetic field, whereby magnetic domains of the free layer become ordered in a first direction, for example, in a direction parallel to the magnetization direction of the pinned layer. As a result, the selected magnetic memory cell “Cs” stores a binary digit data “0”.
Any one of the first write current Isw and the second write cu

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Non-volatile semiconductor memory device with magnetic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile semiconductor memory device with magnetic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device with magnetic... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3083358

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.