Non-volatile semiconductor memory device with facility of storin

Static information storage and retrieval – Systems using particular element – Ternary

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365185, 365104, 357 235, G11C 700, G11C 1604, G11C 1606

Patent

active

050219995

ABSTRACT:
A non-volatile memory cell includes a MOS transistor of double gate construction. The MOS memory transistor includes a floating gate structure which includes electrically separated first and second segmented floating gates (4a; 4b). For the purpose of writing data, electrons are independently injected into the first and second segmented floating gates. Data are stored in the MOS memory transistor in three different non-volatile storage levels; one with electron accumulated either one of the two segmented floating gates; another with electrons injected into both of the segmented floating gates; and still another with no electrons accumulated on both of the segmented floating gates.

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