Non-volatile semiconductor memory device having different...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185220, C365S185290, C365S185300

Reexamination Certificate

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11598788

ABSTRACT:
A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first mode erase operation, which determines different erase pass voltages for the respective memory sectors by successively increasing a bank voltage applied to each sector until the number of failed cells in each sector falls below a first failed cell threshold value, and a second mode erase operation, which applies the different erase pass voltages to the respective memory sectors for successively increasing periods of time until the number of failed cells in each sector falls below a second failed cell threshold value.

REFERENCES:
patent: 6891752 (2005-05-01), Bautista et al.
patent: 7236406 (2007-06-01), Ito et al.
patent: 2005346876 (2005-12-01), None
patent: 1020050108979 (2005-11-01), None

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