Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent
1989-10-24
1991-07-09
Bowler, Alyssa H.
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
365104, 365185, 365226, 3072961, G11C 700, G11C 1600, G11C 1604, H03K 301
Patent
active
050311492
ABSTRACT:
A non-volatile semiconductor device includes word lines, and a non-volatile memory cell array having a plurality of non-volatile memory cells respectively connected to the word lines. The non-volatile semiconductor memory device further includes a level shifter for receiving, in a programmming mode, an address signal supplied from outside, and shifting the potential level of the address signal to a higher programming potential level, and a row decoder, provided between the word lines and the level shifter, for receiving and decoding the address signal which has been shifted by the level shifter, and selecting one of the word lines in accordance with the result of the decoding of the address signal, and setting the potential of the selected word line to the programming potential level.
REFERENCES:
patent: 4737936 (1988-04-01), Takeuchi
Rinerson, D. et al., 512K EPROMS; ISSCC Dig. Tech. Papers, pp. 136-137, Feb. 1984.
Abe Isao
Matsumoto Osamu
Nakano Yuji
Saeki Mika
Bowler Alyssa H.
Kabushiki Kaisha Toshiba
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