Non-volatile semiconductor memory device having a metal-insulato

Details Non-volatile semiconductor memory device having a metal-insulato Non-volatile semiconductor memory device having a metal-insulato

1995-05-30

1997-01-21

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257325, 257410, 257411, H01L 29792, H01L 2976, H01L 2994

Patent

active

055962149

ABSTRACT:
There is provided a metal-insulator-semiconductor gate insulating structure involved in a non-volatile memory device. A first insulating layer formed on the semiconductor substrate has a first dielectric constant .epsilon..sub.1 and a first thickness of t.sub.1. A second insulating layer formed on the first insulating layer layer has a second dielectric constant .epsilon..sub.2 and a second thickness of t.sub.2. A gate electrode of a metal layer is formed on the second insulating layer. The first and second dielectric constants .epsilon..sub.1 and .epsilon..sub.2 and the first and second thicknesses t.sub.1 and t.sub.2 satisfy the conditions of 20.ltoreq..epsilon..sub.2 /.epsilon..sub.1, and t.sub.2 /t.sub.1 .ltoreq..epsilon..sub.2 /.epsilon..sub.1.

REFERENCES:
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patent: 5442585 (1995-08-01), Egnchi et al.
patent: 5478653 (1995-12-01), Guenzer
patent: 5523964 (1996-06-01), McMillan et al.
"Charge Transport and Storage in Metal-Nitride-Oxide-Silicon (MNOS) Structures", Journal of Applied Physics, vol. 40, No. 8, pp. 3307-3319 by D. Frohman-Bentchkowsky et al., Jul. 1969.
D. Kahng et al., "Interfacial Dopants for Dual-Dielectric, Charge-Storage Cells", The Bell System Technical Journal, Nov. 1974, pp. 1722-1739.

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