Non-volatile semiconductor memory device equipped with high-spee

Details Non-volatile semiconductor memory device equipped with high-spee Non-volatile semiconductor memory device equipped with high-spee

1991-10-09

1994-03-08

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365207, 36518907, 365185, G11C 1140

Patent

active

052933334

ABSTRACT:
An electrically erasable and programmable read only memory device has a sense amplifier circuit for changing an output voltage level at the output node thereof indicative of either an erased or a write-in state of a memory cell to be accessed, and the output voltage level is compared with a reference voltage level so as to see whether the output voltage is indicative of the erased state or the write-in state, wherein the sense amplifier circuit is associated with a current make-up circuit for compensating the current to the output node of the sense amplifier circuit so that the output voltage level rapidly reaches a high or low voltage level regardless of fluctuation of the reference voltage level.

REFERENCES:
patent: 4751682 (1988-06-01), Matsuoka et al.
patent: 4758748 (1988-07-01), Takeuchi
patent: 4761765 (1988-08-01), Hashimoto
patent: 4802138 (1989-02-01), Shimamune
patent: 4903237 (1990-02-01), Rao

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