Non-volatile semiconductor memory device and multi-block...

Details Non-volatile semiconductor memory device and multi-block... Non-volatile semiconductor memory device and multi-block...

2006-09-19

2006-09-19

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185220, C365S185110

Reexamination Certificate

active

07110301

ABSTRACT:
A non-volatile semiconductor memory device includes memory blocks and an erase controller configured to control a multi-block erase operation where at least two of the memory blocks are simultaneously erased. According to some embodiments, after selecting and simultaneously erasing the selected memory blocks, an erase verify operation for each of the erased memory blocks is performed according to an externally provided erase verify command and block address. According to some embodiments, if a suspend command is received by the memory device while selected memory blocks are being erased, the erase operation ceases and another operation, such as a read operation, begins. When a resume command is received by the memory device, the erase operation resumes. Other embodiments are described and claimed.

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English language abstract of Japanese Publication No. 08-306196.
English language abstract of Korean Publication No. 30974.
English language abstract of Korean Publication No. 48425.

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