Non-volatile semiconductor memory device and method for writing

Details Non-volatile semiconductor memory device and method for writing Non-volatile semiconductor memory device and method for writing

1998-03-27

1999-08-31

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518518, 36518528, 36518503, G11C 1604

Patent

active

059462361

ABSTRACT:
In order to increase the efficiency of a write operation with respect to a non-volatile semiconductor memory having a floating gate electrode, a memory cell transistor (40) is connected to a bit line (42), which is further connected to a current limitation circuit (30). The current limitation circuit (30) comprises a number of parallely connected switching transistors (31 to 34), and grounds the bit line (42). While a constant level for a write clock .phi.W supplied via a bit line 42, remains, the switching transistors (31 to 34) are stepwise turned to thereby stepwise increase a write current IPP, allowing analog information to be written into the memory cell transistor (40).

REFERENCES:
patent: 5197028 (1993-03-01), Nakai
patent: 5297079 (1994-03-01), Ha
patent: 5313432 (1994-05-01), Lin et al.
patent: 5732022 (1998-03-01), Kato et al.
patent: 5808939 (1998-09-01), Iwahashi

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