Non-volatile semiconductor memory device and method for...

Details Non-volatile semiconductor memory device and method for... Non-volatile semiconductor memory device and method for...

2006-10-25

2009-10-27

Chaudhari, Chandra (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE27103

Reexamination Certificate

active

07608887

ABSTRACT:
In a non-volatile semiconductor memory device having a MONOS structure, a memory cell section for storing information, and a periphery circuitry section for writing and reading the information with respect to the memory cell section are formed in the surface region of a silicon substrate. A plurality of memory cells is formed in the memory cell section, while a plurality of periphery circuitry transistors are formed also in the periphery circuitry section. Since the periphery circuitry transistor has a structure wherein no electric charge accumulation layer exists, it is possible to prevent from electric charge injection to the periphery circuitry transistor, whereby hot carrier characteristics of the periphery circuitry transistor are improved.

REFERENCES:
patent: 6462373 (2002-10-01), Shimizu et al.
patent: 6803620 (2004-10-01), Moriya et al.
patent: 2005/0036366 (2005-02-01), Ono
patent: 2005-064295 (2005-03-01), None

Affiliated with

Also associated with

Rating

Non-volatile semiconductor memory device and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile semiconductor memory device and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device and method for... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4109920