Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-02-15
2011-02-15
Smith, Bradley K (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S314000, C257SE21210, C257SE21209
Reexamination Certificate
active
07888728
ABSTRACT:
In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.
REFERENCES:
patent: 4766088 (1988-08-01), Kono et al.
patent: 5036018 (1991-07-01), Mazzali
patent: 5600164 (1997-02-01), Ajika et al.
patent: 5605853 (1997-02-01), Yoo et al.
patent: 5661052 (1997-08-01), Inoue et al.
patent: 5698879 (1997-12-01), Aritome et al.
patent: 5768186 (1998-06-01), Ma
patent: 5824583 (1998-10-01), Asano et al.
patent: 5841174 (1998-11-01), Arai
patent: 5852311 (1998-12-01), Kwon et al.
patent: 5913120 (1999-06-01), Cappelleti
patent: 5989957 (1999-11-01), Ngo et al.
patent: 6114724 (2000-09-01), Ratnakumar
patent: 6127696 (2000-10-01), Sery et al.
patent: 6265739 (2001-07-01), Yaegashi et al.
patent: 7-302499 (1995-11-01), None
patent: 62-23149 (1985-07-01), None
patent: 62-76668 (1985-09-01), None
patent: 61-201457 (1986-09-01), None
patent: 62-045165 (1987-02-01), None
patent: 02-201968 (1990-08-01), None
patent: 02-246376 (1990-10-01), None
patent: 03-19273 (1991-01-01), None
patent: 03-106076 (1991-05-01), None
patent: 03-283570 (1991-12-01), None
patent: 04-348072 (1992-12-01), None
patent: 05-183134 (1993-07-01), None
patent: 05-190811 (1993-07-01), None
patent: 05-235276 (1993-09-01), None
patent: 06-216393 (1994-08-01), None
patent: 07-074326 (1995-03-01), None
patent: 7-297304 (1995-03-01), None
patent: 7-147403 (1995-06-01), None
patent: 08-23041 (1996-01-01), None
patent: 08-255828 (1996-10-01), None
patent: 08-274043 (1996-10-01), None
patent: 8-274283 (1996-10-01), None
patent: 09-148458 (1997-06-01), None
patent: 11-031799 (1999-02-01), None
Hannon, et al., “0.25 μm Merged Bulk DRAM and SOI Logic Using Patterned SOI”, 2000 Symposium on VLSI Technology Digest of Technical Papers pp. 66-67.
Scheuerlein, et al., “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC 2000/Session 7/TD: Emerging Memory & Device Technologies/ Paper TA 7.2, pp. 128-129.
Yamada, et al., “An Embedded DRAM Technology on SOI/Bulk Hybrid Substrate Formed with SEG Process for High-End SOC Application”, 2002 Symposium On VLSI Technology Digest of Technical Papers, pp. 112-113.
Wolf, et al. “Silicon Processing for the VLSI Era,” 1986, Lattice Press, vol. 1, pp. 384-388.
Office Action dated Aug. 17, 2010, Japanese Patent Application No. 2008-137247, with English Translation, pp. 1-9.
Office Action dated Nov. 30, 2010 in corresponding Japanese Patent Application No. 2008-137247 with English-language translation. (8 pages).
Aritome Seiichi
Shimizu Kazuhiro
Yaegashi Toshitake
Kabushiki Kaisha Toshiba
Karimy Mohammad T
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Smith Bradley K
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