Non-volatile semiconductor memory device allowing erase of stora

Details Non-volatile semiconductor memory device allowing erase of stora Non-volatile semiconductor memory device allowing erase of stora

1992-01-31

1994-03-08

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Erase

365185, G11C 700

Patent

active

052932125

ABSTRACT:
A flash EEPROM with each memory cell including a single transistor, structured, to erase only the data of a desired memory cell, such that a high voltage of 10V is applied to one of all the bit lines in each block, a ground potential of 0V is applied to one of all the word lines in a memory array and a positive potential is applied to the other word lines in a data erasing to cause a tunnel phenomenon between a floating gate and a drain of one memory cell in each of blocks constituting the memory array.

REFERENCES:
patent: 4451905 (1984-05-01), Moyer
patent: 4698787 (1987-10-01), Mukherjee et al.
patent: 4803529 (1989-02-01), Masuoka
patent: 4920512 (1990-04-01), Miyamoto
patent: 4949309 (1990-08-01), Rao
patent: 5047814 (1991-09-01), Hazani
patent: 5050125 (1991-09-01), Momodomi
patent: 5105386 (1992-04-01), Andoh
patent: 5122985 (1992-06-01), Santin
patent: 5134449 (1992-07-01), Gill
IEEE Journal of Solid-State Circuits, vol. 23, No. 5 Oct. 1988, pp. 1157-1162 "An In-System Reprogrammable 32Kx8 CMOS Flash Memory", Virgil Niles Kynett et al.

Affiliated with

Also associated with

Rating

Non-volatile semiconductor memory device allowing erase of stora does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile semiconductor memory device allowing erase of stora, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device allowing erase of stora will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-156826