Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2002-02-21
2003-08-19
Le, Vu Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S201000
Reexamination Certificate
active
06608784
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a technology that may be applied to a non-volatile storage device, for example, to a technology that may be applied to a non-volatile semiconductor memory such as a flash memory or a card storage device such as a multimedia card or a smart media memory card.
Recently, a card storage device, called a memory card containing a non-volatile memory, such as a flash memory, that retains its storage data even after the power has been switched off, is widely used as a data storage medium for portable electronic apparatus such as a digital camera.
As compared with a volatile memory such as a RAM, a non-volatile memory varies widely in its memory device characteristics. At the same time, a non-volatile memory is not designed basically for repeated write operation. Therefore, write errors occur relatively frequently in a memory card in which a non-volatile memory is contained. To solve the above problem, some memory cards containing non-volatile memories execute substitute processing to substitute another area for an area where an error has occurred.
A flash memory, with a two-layer gate structure, stores data by taking advantage of a difference between the threshold voltage levels of the charge stored in the floating gate layer. In this specification, injecting electrons into the floating gate layer to increase the threshold voltage is called a write, and the reverse operation is called an erasure.
Conventionally, even if the write operation is executed under the same condition, a condition (hereinafter called an excessive write error) sometimes occurs in which increasing the write voltage of a storage device in a flash memory sometimes changes the threshold voltage of a particular bit so greatly that the threshold gets out of a desired range. To reduce such excessive write errors, the write voltage should be decreased. However, the problem is that a low write voltage prolongs the time required for writing. So, in general, with priority placed on a shorter write time rather than on a reduction in excessive write errors, the substitute processing described above is performed to recover excessive write error bits. In addition, some conventional memory cards contain an error correction circuit to correct detected error bits before outputting them.
However, excessive write errors occur more frequently as writing and erasure are repeated many times. Thus, a memory card designed to recover excessive write error bits through substitute processing described above, if used for a long time, must perform substitute processing more frequently. This prolongs the total time required for writing and, at the same time, decreases rewrite durability rapidly.
Conventionally, even a memory card containing an error correction circuit is designed to perform substitute processing for a write error even when the error correction circuit is able to correct the error. Therefore, an error correction circuit, if contained in a memory card, cannot prevent a long write time or a rapid decrease in write durability. Investigation made after the application of the present invention reveals that similar inventions, such as JP-A-6-131886 laid-open on May 13, 1994, have been made earlier.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a technology that reduces the write time required by a card storage device containing a non-volatile memory and an error correction circuit.
It is another object of the present invention to provide a technology, for use on a card storage device containing a non-volatile memory and an error correction circuit, that prevents the number of substitute processing executions from increasing with time and to prevent the write durability from decreasing rapidly.
The above-described objects and other objects, as well as the new features, of the present invention will be made more apparent by the detailed description and the accompanying drawings.
According to an aspect of the present invention, when a non-volatile-memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.
According to the above aspect, substitute processing is performed to write data in some other area only when the error correction circuit cannot correct an error. Therefore, as compared with a method that always performs substitute processing when an error occurs, this method greatly reduces the number of substitution processing executions and, as a result, greatly reduces the data write time.
According to another aspect of the present invention, when a write error occurs, the storage device checks if the error is a recoverable error such as an excessive write error which causes the threshold voltage to change greatly even under the same write operation condition. The storage device checks if the error correction circuit can correct the error only when the error is a recoverable error and, only when the error is unrecoverable, performs substitute processing immediately. This reduces the number of times the error correction circuit must check if it can correct the error and reduces the total write time.
According to another aspect of the present invention, either when a write error that can be corrected by the error correction circuit occurs and when the number of error bits is larger than a predetermined number of bits, n, but smaller than a predetermined number of bits, m (where m>n), or, for write data smaller than one sector that is one unit of data written at a time, when no-write data in the same sector that is read contains an error and when the error correction circuit has judged that it can correct the error, the corrected data is written in the original location. This returns a bit, whose data has been changed by the so-called a retention defect, to a normal state. The retention defect refers to a change in the threshold voltage caused when a bit is not rewritten for a long time.
REFERENCES:
patent: 5907856 (1999-05-01), Estakhri et al.
patent: 6134143 (2000-10-01), Norman
patent: 6-131886 (1994-05-01), None
Kanamori Motoki
Katayama Kunihiro
Kurakata Shigeo
Shikata Atsushi
Shiraishi Atsushi
Le Vu Anh
Miles & Stockbridge P.C.
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