Static information storage and retrieval – Read/write circuit – Testing
Patent
1993-03-15
1994-10-18
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Testing
36523003, 36523006, G11C 700
Patent
active
053574729
ABSTRACT:
For directly observing from the outside the electrical characteristics of a memory cell, i.e., a voltage-current characteristic and threshold voltage in a non-volatile semiconductor memory device, there are provided same bit train selector means 5 for selecting and switching on a plurality of bit train selecting FETs(QB.sub.o, QB.sub.1. . . , QB.sub.n) each for interconnecting an external terminal 4 to which arbitrary voltage is applied and respective memory cell arrays 1a, 1b, . . . , 1n with each other and forming a current path extending from a specific memory cell FET (Q.sub.1) on the same bit train memory cell array to the external terminal, and a power supply circuit for supplying variable voltage to a gate of the specific memory cell FET (Q.sub.i). Hereby, there are improved the yield of articles and the accuracy of failure article analyses.
REFERENCES:
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patent: 4583205 (1986-04-01), Watanabe
patent: 4597062 (1986-06-01), Asano et al.
patent: 4779272 (1988-10-01), Kohda et al.
patent: 4958324 (1990-09-01), Devin
patent: 5109257 (1992-04-01), Kondo
patent: 5126970 (1992-06-01), Ul Haq
LaRoche Eugene R.
Mitsubishi Denki & Kabushiki Kaisha
Niranjan F.
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