Non-volatile semiconductor memory device

Details Non-volatile semiconductor memory device Non-volatile semiconductor memory device

1993-05-17

1998-03-03

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257316, 257314, H01L 2976, H01L 29788

Patent

active

057238880

ABSTRACT:
A non-volatile semiconductor memory device for NAND application is described herein. The device comprises three layers of polysilicon with the first layer used as Y-control gate and second layer used as floating gate and the third layer used as X-control gate. The device has a high gate capacitance coupling ratio. In an array, the device can be programmed and erased randomly without being limited in a serial fashion.

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Muller et al, Device Elec For Ic's, 1986, pp. 452-454.
Shirota et al. "A 2.3.mu.m.sup.2 Memory Cell Structure for 16 Mb NAND EEPROMs" IEDM 1988, Technical Digest, pp. 103-106.
Momodomi et al. "New Device Technologies for 5V-Only 4 Mb EEPROM with NAND Structure Cell", IEDM 1988, Technical Digest, pp. 412-415.

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