Non-volatile semiconductor memory device

Details Non-volatile semiconductor memory device Non-volatile semiconductor memory device

1996-04-22

1997-11-25

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365177, 365181, 36518518, G11C 700

Patent

active

056919441

ABSTRACT:
In a non-volatile semiconductor memory device having a writing power source voltage which is supplied thereto exceeding a withstand voltage of a field effect transistor, the object of the present invention is to reduce the number of kinds of field effect transistors constituting the non-volatile semiconductor memory device thereby reducing manufacturing cost. In a non-volatile semiconductor memory device which has a writing circuit 125 for controlling a connection of a writing load to a bit line designated by an output of a column decoder 117 in accordance with a signal of a writing data line 114, and a bias circuit 118 for outputting a bias voltage to set a cell writing voltage of a memory cell array by reducing the writing power source voltage. The semiconductor memory device has an N-type transistor 102 which receives an output of the bias circuit 118 in its gate electrode and outputs a cell writing voltage to a cell writing voltage line 105, and the wiring load constituted of a P-type transistor 104 of a complementary type to that of the N-type transistor 102, the P-type transistor being connected between a cell writing voltage line 105 and a bit line of a memory cell array.

REFERENCES:
patent: 5274590 (1993-12-01), Kashimura
patent: 5329488 (1994-07-01), Hashimoto
patent: 5544110 (1996-08-01), Yuh

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