Non-volatile semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257321, 36518523, 36518524, H01L 29788

Patent

active

059988312

ABSTRACT:
A plurality of memory cells are arranged in lattice arrangement to form a memory cell array. Each of the memory cells is provided with a source. Data in the memory cell can be electrically written and erased. Sources of all the memory cells are connected in common. Also, a source voltage control circuit having two or more kinds of load characteristics is connected to the sources connected in common. According to a load characteristics selected from a plurality of load characteristics, source voltage of the memory cell is controlled.

REFERENCES:
patent: 5371705 (1994-12-01), Nakayama et al.
patent: 5608670 (1997-03-01), Akaogi et al.
patent: 5625591 (1997-04-01), Kato et al.
patent: 5659505 (1997-08-01), Kobayashi et al.

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