Non-volatile semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having fuse element

Reexamination Certificate

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Reexamination Certificate

active

08045414

ABSTRACT:
The row decoder receives writing instruction signal and reading instruction signal to selectively activate one of the word lines according to an input state of row address signals. The data buffer receives a data input signal when the writing instruction signal is received, and drives corresponding one of the bit lines and amplifies a minute reading signal transmitted to one of the bit lines to output a data output signal when the reading instruction signal is received.The power supply circuit supplies a certain voltage to the memory cell, and in response to the reading instruction signal, keeps the voltage at a ground potential.

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patent: 6671040 (2003-12-01), Fong et al.
patent: 7206214 (2007-04-01), Hoefler et al.
patent: 7590018 (2009-09-01), Namekawa
patent: 2007/0016738 (2007-01-01), Hosono et al.
patent: 2008/0068916 (2008-03-01), Sako
patent: 2008/0080295 (2008-04-01), Namekawa et al.
patent: 2008/0165564 (2008-07-01), Namekawa
patent: 2008/0165586 (2008-07-01), Matsufuji et al.
patent: 2008/0316852 (2008-12-01), Matsufuji et al.

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