Non-volatile semiconductor memory cell with control gate and flo

Details Non-volatile semiconductor memory cell with control gate and flo Non-volatile semiconductor memory cell with control gate and flo

1992-12-31

1999-01-12

Whitehead, Carl W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257306, H01L 29788

Patent

active

058594558

ABSTRACT:
A non-volatile semiconductor memory cell includes a semiconductor substrate with a source and a drain formed therein. A channel is defined between the source and the drain. Atop the channel is a floating gate which is controlled by the X-control line and the Y-control line. The floating gate is uniquely disposed in the semiconductor substrate relative to the control lines such that when it is not addressed, the memory cell is isolated from the rest of the memory cells. As a consequence, the normal programming, deprogramming, and reading operations with other cells are not interfered. Moreover, the unique structure also facilitates the addressing of each of the memory cell.

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patent: 5153691 (1992-10-01), Guterman
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