Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2005-11-29
2005-11-29
Le, Vu A. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S230030
Reexamination Certificate
active
06970388
ABSTRACT:
A non-volatile semiconductor memory device includes a memory cell array having a plurality of non-volatile memory cells, a decode circuit configured to decode address data as input thereto to select a memory cell from the memory cell array, and a data sense circuit configured to detect and amplify the data of the selected memory cell of the memory cell array. The memory cell array includes an initial setup data region with initial setup data and status data being programmed thereinto. The initial setup data is used for determination of memory operating conditions, and the status data indicates whether the initial setup data region is presently normal or not in functionality.
REFERENCES:
patent: 8-44628 (1996-02-01), None
Himeno Toshihiko
Ikehashi Tamio
Takeuchi Ken
Kabushiki Kaisha Toshiba
Le Vu A.
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
LandOfFree
Non-volatile semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3458442