Static information storage and retrieval – Read/write circuit – Testing
Patent
1988-11-01
1989-08-29
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Testing
36518901, 36523003, 371 21, G11C 700, G11C 1140, G11C 2900
Patent
active
048624187
ABSTRACT:
In programmable memories of the EPROM or EEPROM type, a row and/or column of test memory cells are added to the matrix of rows and columns of non-volatile memory cells for the testing of the peripheral circuits which select and read the memory cells. The test memory cells have a very short write time as compared with the non-volatile memory cells and may be of the dynamic (or volatile) type. The write time for a memory cell of the EPROM or EEPROM may be, for example, 10 msec. The write time for a dynamic memory cell, however, is 100 nsec. The time required for testing the peripheral circuits can therefore be reduced by a factor of 80 (for a 16 Kbit memory) or higher (for memories larger than 16 Kbits).
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Cuppens Roger
Koomen Joannes J. M.
Biren Steven R.
Bowler Alyssa H.
Hecker Stuart N.
U.S. Philips Corp.
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