Non-volatile programmable memory having an SRAM capability

Static information storage and retrieval – Addressing – Byte or page addressing

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36518523, 36518905, 36523008, G11C 700

Patent

active

057243034

ABSTRACT:
A computer system includes a computing device such as a microcontroller and a memory device. The memory device is illustrtively a serial device connected to the serail port of the microcontrollerThe memory device includes a page latch load circuit which provides serial I/O to the microcontroller and transfers I/O bits in a predetermined order to/from the page latches. Page latches are connected over many bit lines to a memory cell array. The page latches not only supports programming and reading of sectors in the memory cell array, but also provides one or more of the following functions: directly accessable to the microcontroller as an SRAM scratch pad, directly loadable from the memory cell array to facilitate single byte "read-modify-write" operations, and loadable during programming operations to support real time applications.

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