Non-volatile memory with predictable failure modes and method of

Details Non-volatile memory with predictable failure modes and method of Non-volatile memory with predictable failure modes and method of

1986-02-24

1988-03-08

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Flip-flop

365185, G11C 1100

Patent

active

047302747

ABSTRACT:
A non-volatile memory device comprising a volatile memory and a non-volatile memory. The volatile memory comprises a volatile memory circuit, such as a D-type cell, or the like, which incorporates a data input, a volatile storage circuit for storing Q and Q output signals, and Q and Q data outputs. The non-volatile memory comprises circuitry which selectively stores a predetermined one of the Q and Q output signals, and which selectively transfers the stored signal to the volatile memory. The non-volatile memory may comprise, for example, a FATMOS transistor, or the like, and control circuitry coupled thereto. The non-volatile memory also includes transistor circuitry coupled between a voltage source and the FATMOS transistor, for example, which selectively controls the storage and transfer of signals between the non-volatile memory circuit and the volatile storage circuit in conjunction with signals applied to the control circuitry. This device may be employed as a fail-safe switching device due to the nature of the failure modes of the non-volatile memory. A method of data storage and retrieval is also disclosed.

REFERENCES:
patent: 4354255 (1982-10-01), Stewart
H. H. Chao, IBM Technical Disclosure Bulletin, "Static RAM with Nonvolatile Back Up Memory", Oct. 1981, pp. 2456-2457.

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