Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2005-06-28
2005-06-28
Peikari, B. James (Department: 2186)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
C710S003000, C710S005000, C710S014000, C710S020000, C710S021000, C710S035000, C710S036000, C710S053000, C711S150000, C711S168000, C711S005000, C365S189040, C365S230030
Reexamination Certificate
active
06912598
ABSTRACT:
An electrically alterable semiconductor memory comprises at least two substantially independent memory banks, and a first control circuit for controlling operations of electrical alteration of the content of the memory. The first control circuit permits the selective execution of an operation of electrical alteration of the content of one of the at least two memory banks. The memory also comprises second control circuit that permits, simultaneously with said operation of electrical alteration of the content of one of the at least two memory banks, a burst mode, page mode, or standard read operation for reading the content of the other memory bank.
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patent: 5263003 (1993-11-01), Cowles et al.
patent: 5371877 (1994-12-01), Drako et al.
patent: 5847998 (1998-12-01), Van Buskirk
patent: 5867430 (1999-02-01), Chen et al.
patent: 6178129 (2001-01-01), Chen
patent: 09106669 (1997-04-01), None
patent: WO 99/35650 (1999-07-01), None
Bartoli Simone
Bedarida Lorenzo
Geraci Antonino
Sali Mauro
Iannucci Robert
Peikari B. James
STMicroelectrics S.r.l.
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