Non-volatile memory with a stable threshold voltage on SOI...

Details Non-volatile memory with a stable threshold voltage on SOI... Non-volatile memory with a stable threshold voltage on SOI...

2011-06-14

2011-06-14

Phung, Anh (Department: 2824)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S324000, C257S348000, C257S066000, C257S402000, C257SE29273, C257SE29309

Reexamination Certificate

active

07960792

ABSTRACT:
A non-volatile memory disposed in a SOI substrate is provided. The non-volatile memory includes a memory cell and a first conductive type doped region. The memory cell includes a gate, a charge storage structure, a bottom dielectric layer, a second conductive type drain region, and a second conductive type source region. The gate is disposed on the SOI substrate. The charge storage structure is disposed between the gate and the SOI substrate. The bottom dielectric layer is disposed between the charge storage layer and the SOI substrate. The second conductive type drain region and the second conductive type source region are disposed in a first conductive type silicon body layer next to the two sides of the gate. The first conductive type doped region is disposed in the first conductive type silicon body layer and electrically connected to the first conductive type silicon body layer beneath the gate.

REFERENCES:
patent: 6154091 (2000-11-01), Pennings et al.
patent: 6180984 (2001-01-01), Golke et al.
patent: 7126170 (2006-10-01), Inoue et al.
patent: 7432552 (2008-10-01), Park et al.
patent: 7764540 (2010-07-01), Morishita et al.

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