Non-volatile memory which can be erased word by word constructed

Details Non-volatile memory which can be erased word by word constructed Non-volatile memory which can be erased word by word constructed

1978-09-14

1980-06-24

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

307238, 357 23, 365184, 365218, G11C 1140

Patent

active

042098491

ABSTRACT:
A semiconductor memory is disclosed having a plurality of individual semiconductor storage cells. Each cell has at least one field effect transistor with a floating storage gate entirely surrounded by an insulating layer. An additional insulated control gate is provided above the storage gate. Discharge of the floating storage gate occurs by a direct transfer of electrons from the floating gate through the insulating layer under the influence of a strong electric field. Programming of the field effect transistor wherein the floating gate is charged occurs by the same physical mechanism as erasure of the field effect transistor. The transfer of electrons during programming and erasure occurs at the same transfer region of the insulating layer but in opposite directions. The electrons which are transferred during programming and erasure have the lattice temperature. A capacitance between the control gate and the floating gate is high relative to a capacitance between the floating gate and the substrate. With the semiconductor memory disclosed, technical difficulties arising from charging and discharging floating storage gates by different physical mechanisms are substantially eliminated.

REFERENCES:
patent: 3651490 (1972-03-01), Onoda et al.
patent: 3996657 (1976-12-01), Simko
patent: 4087795 (1978-05-01), Rossler
patent: 4099196 (1978-07-01), Simko
patent: 4112509 (1978-09-01), Wall

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