Static information storage and retrieval – Read/write circuit – Common read and write circuit
Reexamination Certificate
2011-08-16
2011-08-16
Mai, Son L (Department: 2827)
Static information storage and retrieval
Read/write circuit
Common read and write circuit
C365S189150, C365S100000, C365S148000, C365S207000, C365S208000
Reexamination Certificate
active
08000155
ABSTRACT:
The present invention provides a method for writing data to a non-volatile memory device having first wirings and second wirings intersecting one another and memory cells arranged at each intersection therebetween, each of the memory cells having a variable resistive element and a rectifying element connected in series. According to the method, the second wirings are charged to a certain voltage not less than a rectifying-element threshold value, prior to a rise in a selected first wiring. Then, a selected first wiring is charged to a voltage required for writing or erasing, after which a selected second wiring is discharged.
REFERENCES:
patent: 5994757 (1999-11-01), Ichikawa et al.
patent: 6259644 (2001-07-01), Tran et al.
patent: 6324093 (2001-11-01), Perner et al.
patent: 6678189 (2004-01-01), Tran
patent: 6831854 (2004-12-01), Rinerson et al.
patent: 7092277 (2006-08-01), Bedeschi et al.
patent: 7248475 (2007-07-01), Paydar et al.
patent: 7307268 (2007-12-01), Scheuerlein
patent: 7535748 (2009-05-01), Shirahama et al.
patent: 7539040 (2009-05-01), Tamai et al.
patent: 7570511 (2009-08-01), Cho et al.
patent: 7706178 (2010-04-01), Parkinson
patent: 7898840 (2011-03-01), Maejima
patent: 2006/0187115 (2006-08-01), Terashima et al.
patent: 2006/0203541 (2006-09-01), Toda
patent: 2007/0091671 (2007-04-01), Ooishi et al.
patent: 2009/0279344 (2009-11-01), Toda
patent: 2010/0214831 (2010-08-01), Kim et al.
patent: 2011/0051492 (2011-03-01), Toda
patent: 7-263647 (1995-10-01), None
patent: 2004-319587 (2004-11-01), None
patent: 2007-73176 (2007-03-01), None
patent: 2008-123595 (2008-05-01), None
patent: WO 02/078003 (2002-10-01), None
Y. Hosoi et al., “High Speed Unipolar Switching Resistance RAM (RRAM) Technology”. IEEE International Electron Devices Meeting 2006, Tech. Dig., pp. 793-796.
Edahiro Toshiaki
Futatsuyama Takuya
Hosono Koji
Kanda Kazushige
Ohshima Shigeo
Kabushiki Kaisha Toshiba
Mai Son L
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
LandOfFree
Non-volatile memory device and method for writing data thereto does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile memory device and method for writing data thereto, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile memory device and method for writing data thereto will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2714185