Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-09-18
2008-10-28
Chaudhari, Chandra (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27103
Reexamination Certificate
active
07442998
ABSTRACT:
A method of fabricating a non-volatile memory is provided. A memory cell array having first memory units and second memory units is formed on a substrate. Then, a source region and a drain region are formed in the substrate on the respective sides of the memory cell array. Next, a patterned first inter-layer insulating layer is formed on the substrate to form a first trench and a plurality of second trenches. A conductive layer is formed on the substrate to form a source line in the first trench and conductive lines in the second trenches. A second inter-layer insulating layer is formed on the substrate and then a conductive plug having contact with the drain region is formed in the second inter-layer insulating layer and the first inter-layer insulating layer. Then, a bit line having contact with the conductive plug is formed on the second inter-layer insulating layer.
REFERENCES:
patent: 6624024 (2003-09-01), Prall et al.
patent: 7180128 (2007-02-01), Hung et al.
Pittikoun Saysamone
Tseng Wei-Chung
Wei Houng-Chi
Chaudhari Chandra
Jianq Chyun IP Office
Powerchip Semiconductor Corp.
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