Non-volatile memory cells

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S316000, C257SE29129

Reexamination Certificate

active

10770579

ABSTRACT:
A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film provided on the semiconductor substrate, a floating gate electrode provided on the tunnel insulating film, the width of the floating gate electrode changing in the height direction of the non-volatile memory cell in channel width or length direction there, and being thinnest between a region above the bottom surface of the floating gate electrode and a region below the upper surface thereof, a control gate electrode above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.

REFERENCES:
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Lee, J. D. et al., “Effects of Floating-Gate Interference on NAND Flash Memory Cell Operation”, IEEE Electronic Device Letters, vol. 23, No. 5, pp. 264-266, (Mary 2002).
Notification of Reasons for Rejection issued by Japanese Patent Office, mailed Jul. 5, 2005, for Japanese Patent Application No. 2003-148132, and English-language translation thereof.

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