Non-volatile memory cell with buried select gate, and method...

Details Non-volatile memory cell with buried select gate, and method... Non-volatile memory cell with buried select gate, and method...

2008-12-03

2010-12-14

Mandala, Victor A (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S319000, C257SE29300, C257SE21179, C438S257000, C438S267000

Reexamination Certificate

active

07851846

ABSTRACT:
A memory device, and method of making the same, in which a trench is formed into the surface of a semiconductor substrate. Source and drain regions define a channel region there between. The drain is formed under the trench. The channel region includes a first portion that extends along a bottom wall of the trench, a second portion that extends along a sidewall of the trench, and a third portion that extends along the surface of the substrate. The floating gate is disposed over the channel region third portion. The control gate is disposed over the floating gate. The select gate is at least partially disposed in the trench and adjacent to the channel region first and second portions. The erase gate disposed adjacent to and insulated from the floating gate.

REFERENCES:
patent: 5572054 (1996-11-01), Wang et al.
patent: 5780341 (1998-07-01), Ogura
patent: 6747310 (2004-06-01), Fan et al.
patent: 6885586 (2005-04-01), Chen et al.
patent: 6891220 (2005-05-01), Yeh et al.
patent: 6894339 (2005-05-01), Fan et al.
patent: 6917069 (2005-07-01), Kianian et al.
patent: 6952033 (2005-10-01), Kianian et al.
patent: 6952034 (2005-10-01), Hu et al.
patent: 7315056 (2008-01-01), Klinger et al.
patent: 7411246 (2008-08-01), Kianian
patent: 2004/0130947 (2004-07-01), Fan et al.
patent: 2004/0212006 (2004-10-01), Harari et al.
patent: 2005/0146937 (2005-07-01), Fan et al.
patent: 2005/0250335 (2005-11-01), Huang et al.
patent: 2006/0160305 (2006-07-01), Mokhlesi et al.
patent: 2007/0252192 (2007-11-01), Mokhlesi et al.
patent: 2009/0242959 (2009-10-01), Lin et al.

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