Static information storage and retrieval – Read/write circuit – Erase
Patent
1994-04-26
1995-07-11
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Erase
365185, 257315, G11C 1600
Patent
active
054327490
ABSTRACT:
An arrangement for reducing the erratic operation of a non-volatile memory cell caused by the accumulation of holes at a specific location within the cell during the electrical erasing of the cell includes a layer of hole confinement material positioned at the specific location the holes accumulate for containing the holes in a specific area. The arrangement also includes an arrangement for removing the holes from the containment area. A method of reducing the erratic operation of a non-volatile memory cell caused by the accumulation of holes at a specific location within the cell during the electrical erasing of the cell includes the step of providing a layer of hole confinement material positioned at the specific location the holes accumulate for containing the holes in the layer of hole confinement material.
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National Semiconductor Corporation
Nelms David C.
Tran Andrew Q.
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