Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1982-11-05
1985-10-08
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
371 10, G11C 1140
Patent
active
045464545
ABSTRACT:
A non-volatile memory cell circuit is used to replace a polysilicon fuse as an enabling element for a redundant row or column of memory cells in a semiconductor memory array. The fuse is divided into read and program sections, allowing a large device to be used for reading and a small device to be used for programming, thus permitting programming of all fuses in a redundant row simultaneously with minimal current consumption. The circuit may be embodied as a five-device or a four-device configuration.
REFERENCES:
patent: 3753244 (1973-08-01), Sumilas et al.
Gupta Anil
Perlegos George
Popek Joseph A.
Seeq Technology Inc.
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