Non-volatile memory cell and sensing method

Details Non-volatile memory cell and sensing method Non-volatile memory cell and sensing method

2000-12-08

2002-05-07

Ho, Hoai V. (Department: 2818)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S230030

Reexamination Certificate

active

06385077

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a non-volatile memory, and more particularly to a non-volatile ferroelectric capacitor memory and a method for sensing ferroelectric capacitor data in a memory cell.
BACKGROUND OF THE INVENTION
It is well known that ferroelectric material performs a hysteresis characteristic and is capable of retaining polarization state even when the applied power is removed from the material. Ferroelectric capacitors are fabricated by placing a layer of ferroelectric material between two conductive plates.
FIG. 1
illustrates a hysteresis curve of ferroelectrical material, wherein the abscissa represents the field voltage applied to the material and the ordinate represents the polarization of the material. If a capacitor is formed using a ferroelectric material between its plates, because of the hysteresis curve, the flow of current through the capacitor will depend on the prior history of the voltages applied to the device. If a ferroelectric capacitor is in a initial state on which zero volt is applied, point A or point D may indicate polarization. Assuming that point A in
FIG. 1
indicates polarization, a positive voltage which is greater than the coercive voltage (referring to point B in
FIG. 1
) is applied across the capacitor, then the capacitor will conduct current and have a new polarization (referring to point C in
FIG. 1
) state. When the applied voltage is removed, the ferroelectric capacitor will maintain the same polarization state as shown at point D instead of returning to the state as shown at point A. A positive voltage continuously applying across the capacitor will cause a little change on the polarization. However, an enough negative voltage will cause the polarization to vary from point D to point E as indicated in FIG.
1
. Once the negative voltage is removed from the capacitor, the ferroelectric capacitor will maintain the same polarization state and the curve moves to point A. Therefore, point A and point D respectively represent two different logical states when zero volt is applied across the capacitor.
Nonvolatile semiconductor ferroelectric memories can memorize “1” or “0” using different polarization state, and such polarization state will not be destroyed when the power is removed from the memory. Referring
FIG. 2
, conventional ferroelectric memory circuits include a word line
201
, a bit line
203
, a plate line
205
for driving ferroelectric capacitor and a memory cell
200
comprising a transistor
207
and a ferroelectric capacitor
209
, wherein the transistor
207
and the ferroelectric capacitor
209
are located between the plate line
205
and the bit line
203
. Memory cell
200
can be selected by inputing a signal in word line
201
to drive transistor
207
, and then driving the plate line
205
with a pulse. If the ferroelectric capacitor initially stored the same polarization state, only small amount of electrical charge would be transferred from the ferroelectric capacitor
209
to the bit line
203
. On the other hand, if the ferroelectric capacitor initially stored another polarization state, a large amount of electrical charge is transferred from the ferroelectric capacitor
209
to the bit line
203
. A sensing amplifier circuit (not shown in the figure) is utilized to sense the charge transferred to the bit line
203
, and then determine the polarization state initially stored in the ferroelectric capacitor.
Only a small amount of electrical charge is transferred from the ferroelectric capacitor
209
to the bit line
203
during the reading cycle, and which will not change the polarization state of the ferroelectric capacitor. Hence, the reading for the ferroelectric capacitor is a nondestructive read in the state. However, when the reading operation of a ferroelectric capacitor is accompanied by the transfer of a large amount of electrical charge to the bit line
203
, the polarization state of ferroelectric capacitor will change to the other state. Hence, the reading of the ferroelectric capacitor is destructive read in the state. In order to maintain the original data (original polarization state), the conventional memory circuit need a restore cycle for restoring the original data due to the destructive read. In writing the data to the ferroelectric capacitor, the plate line
205
is pulsed with a positive or negative voltage, and then the ferroelectrical capacitor polarization state is determined based on the hysteresis curve.
SUMMARY OF THE INVENTION
The read operation cycle of a conventional ferroelectric capacitor memory circuit often involves a destructive read for the ferroelectric capacitor changes state from one polarization state to the other. In order to maintain the original data (original polarization state), the conventional memory circuit need a restore cycle for restoring the original data. The time required for restoring data may reduce the operation speed. In those reading operation cycles which include the destructive read and restoring cycle may result in the ferroelectric material “fatigue”, which reduces the life. As a result of the “fatigue”, the reliability and life of a ferroelectric capacitor is proportional to the number of times it has been read and write. If the power failed during the restoring operation period, the stored data would be destroyed.
FIG. 3
illustrates a nonlinear hysteresis curve due to the ferroelectric capacitor age through use. It becomes increasingly difficult to determine the correct polarization state. For example, if a ferroelectric capacitor of a memory cell is polarized at point A, a positive voltage greater than the coercive voltage is applied to the memory cell. The polarization state of the ferroelectric capacitor corresponding to the curve may be moved to the point C. When moving from point A to point C, the capacitor will conduct current. However, when reading from a ferroelectric capacitor of a memory cell, having polarity on point D by using a positive voltage, a current will be still introduced as the polarity curve moves to point C. The difference between the resultant currents of the two different states of the capacitor becomes smaller due to the capacitor age, which increases the difficult to determine the polarization state.
The present invention describes an integrated circuit memory comprising an array of ferroelectric memory cell comprising a transistor and a ferroelectric capacitor, a plurality of bit lines and a plurality of word lines. The present invention also describes a method for reading and writing data in memory cells.
From the foregoing, in accordance with the main purpose of this present invention, the disclosed ferroelectric memory circuit and the operation method reduce or eliminate the disadvantage and shortcomings associated with prior art. According to the invention, a ferroelectric capacitor may have different polarization states by applying a different driving pulse and the different polarization states may cause different output voltage. Hence, a ferroelectric capacitor is read by sensing the output voltage, and then determining the polarization state of the ferroelectric capacitor. The method avoids the shortcoming of the conventional method sensing electrical charge.
According to the present invention, the disclosed ferroelectric memory circuit and operation method adapted for reading ferroelectric capacitor such that the polarization states are not destroyed or switched to the other state and does not require a subsequent restore operation also. Hence, it does not affect the life or reliability of the capacitor due to fatigue result from the switch of polarization states. The present invention also disclosed a simple method for writing the polarization states of a memory cell.


REFERENCES:
patent: 5774392 (1998-06-01), Kraus et al.
patent: 6072711 (2000-06-01), Kang
patent: 6172897 (2001-01-01), Shuto
patent: 6198652 (2001-03-01), Kawakubo et al.

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