Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-07-08
2003-07-01
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C712S014000, C712S229000, C712S220000
Reexamination Certificate
active
06587914
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a non-volatile memory capable of executing a program independently from a microprocessor.
BACKGROUND OF THE INVENTION
The families of the non-volatile memories, among which are the EEPROMs and the Flash EEPROM, share a fundamental property: They all effect a conversion of binary codes. Such conversion is performed by decoding the code that is introduced in input, getting a number of distinct signal lines, resulting from all the possible combinations of the bits of the input code; these lines are then encoded in the desired output word through a circuit called an encoder. The memory matrix produces therefore the desired functional relationship between input and output.
From this point of view it is reasonable to classify a non-volatile matrix as a combinatorial circuit, not as a sequential circuit because the outputs depend entirely from the actual inputs and not from the preceding history of the circuit. What is stored is the functional relationship between inputs and outputs.
In the electronic devices comprising microcomputers, that is computers in which a microprocessor is present, the non-volatile memory is used to store the program that must be performed by the microprocessor.
The microprocessor is an integrated circuit that contains a control unit and an arithmetic-logic unit and has an internal state that is usually controllable from the outside through a programmable fixed memory.
The microprocessor is a very complex unit, capable of performing programs involving operations of calculation, of comparison of data, of timing and other usually essential operations in the actual electronic devices.
The structure of a microcomputer essentially consists of a central processing unit (microprocessor), a memory, and input/output devices. The program that must be performed by the microprocessor is stored in a non-volatile memory. During operation the microprocessor extracts the instructions from the memory, performing them in succession and elaborating therefore the data according to the program. During elaboration the results of the same can be provided to the outside through the output devices. The memory has therefore the purpose to preserve the program, i.e., the instructions and the data necessary to the operation of the microprocessor.
In
FIG. 1
there is schematically represented a block diagram of a microcomputer in which a non-volatile memory
1
is present that contains the control program of the system, a microprocessor
2
, a RAM memory
3
that temporarily stores instructions and data, these last written in memory locations each one having a respective address. Also present is an input/output I/O unit
4
that receives signals
5
of input and output. The various elements are connected by a data bus
6
, bidirectionally carrying the data among the different sections of the microcomputer, and by an address and control bus
7
, unidirectional and adapted to transmit the address of the memory location which is desired to be read or written, or of the input or output device that must be activated, and to carry the control signals necessary for example to enable the memory to operate in reading or writing or to enable the circuits of input-output interface.
In
FIG. 2
the functional structure of the non-volatile memory
1
of
FIG. 1
is schematically shown. The input signals
8
, comprising control and address signals, are sent through input buffers
10
to a matrix of memory cells
11
that decodes them and sends respective coded signals
9
to output buffers
12
connected to the data bus
6
.
The elements shown in
FIG. 2
are present in any non-volatile memory and they constitute the fundamental structure thereof, even if other functional blocks are generally foreseen, such as for instance circuits of control or verification.
In several applications, the power of calculation, essential for instance in a computer, is not necessary and the execution of a program is reduced to the simple execution in sequential way of the instructions contained in the memory. For instance, the distributors of drinks perform a sequential program, which uses in reality few instructions, performing only a series of timed operations that, in principle, do not require the use of a microprocessor. Other examples are found in appliances such as dishwashers, washing machines or refrigerators, which perform some identical cycles in time that need not a great flexibility.
SUMMARY OF THE INVENTION
The present invention provides a non-volatile memory configured to behave as a RISC (Reduced Instruction Set Computer) machine, performing a limited set of instructions that substantially make the non-volatile memory a sequential machine. This additional intelligence of the non-volatile memory does not pose it at the same level of a microcontroller; however, it could allow the memory itself to perform some simple tasks, leaving more difficult tasks to the microprocessor.
Additionally, such memory would, if the particular application makes it possible, avoid the use of a microprocessor with a significant reduction of costs.
The present invention provides a non-volatile memory semiconductor device having an address buffer block, a matrix of memory cells, and an output buffer block, the address buffer block receiving input signals external to the memory device, that in a first operating condition are controlled by devices external to the memory device, and transmitting signals to the matrix of memory cells, adapted to decode the received signals and to transmit in turn decoded signals in output through the output buffer block. Further included is a command block, activatable by an external control signal that, once activated, sets the memory device in a second operating condition in which the command block receives at least a part of the signals in output from the matrix of memory cells and, after having processed them, transmits internal address signals to the address buffer block to get a feedback inside the memory device suitable for making the memory device able to perform a succession of instructions memorized in the matrix of memory cells autonomously.
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Bataille Pierre-Michel
Jorgenson Lisa K.
Kim Matthew
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
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