Non-volatile memory array

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S316000, C257S390000, C257SE27081

Reexamination Certificate

active

11164174

ABSTRACT:
A non-volatile memory array including memory units which are arranged in a row/column array is provided. Source lines are arranged in parallel in the column direction and connect to the source regions of the memory units in the same column. Bit lines are arranged in parallel in the row direction and connect to the drain regions of the memory units in the same row. Word lines are arranged in parallel in the column direction and connect to the select gates of the memory units in the same column. Control lines are arranged in parallel in the column direction and connect to the control gates of the memory units in the same column. The control lines are grouped into several groups with n control lines (n is a positive integer not less than 2) in one group, and the control lines in each group are electrically connected to each other.

REFERENCES:
patent: 5710072 (1998-01-01), Krautschneider et al.
patent: 6392636 (2002-05-01), Ferrari et al.
patent: 6812574 (2004-11-01), Tomita et al.
patent: 6884588 (2005-04-01), Rastogi et al.
patent: 2006/0197145 (2006-09-01), Pittikoun et al.

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