Non-volatile memory and fabricating method thereof

Details Non-volatile memory and fabricating method thereof Non-volatile memory and fabricating method thereof

2006-08-08

2008-08-05

Smith, Zandra (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S318000, C257S321000, C438S257000, C438S264000

Reexamination Certificate

active

07408220

ABSTRACT:
A method of fabricating a non-volatile memory is provided. A plurality of columns of isolation structures are formed on a substrate. A plurality of rows of stacked gate structures crossing over the isolation structures are formed on the substrate. A plurality of doping regions are formed in the substrate between two neighboring stacked gate structures. A plurality of stripes of spacers are formed on the sidewalls of stacked gate structures. A plurality of first dielectric layers are formed on a portion of the isolation structures adjacent to two rows of stacked gate structures. Also, one isolation structure is disposed between two neighboring first dielectric layers in the same row, while two neighboring rows comprising the first dielectric layer and the isolation structure are arranged in an interlacing manner. A plurality of first conductive layers are formed between two neighboring first dielectric layers in the same row.

REFERENCES:
patent: 5416349 (1995-05-01), Bergemont
patent: 5589413 (1996-12-01), Sung et al.
patent: 6689658 (2004-02-01), Wu
patent: 6723604 (2004-04-01), Yuan et al.

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