Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2000-09-26
2004-04-20
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S135000, C711S142000, C711S143000
Reexamination Certificate
active
06725342
ABSTRACT:
FIELD OF THE INVENTION
Embodiments of the present invention relate to data storage. More particularly, embodiments of the present invention relate to cache coherency for non-volatile cache coupled to a mass storage device.
BACKGROUND OF THE INVENTION
A computer can store data both in a volatile memory and a non-volatile mass storage device. Examples of volatile memory include, but are not limited to, dynamic random access memory (DRAM), static random access memory (SRAM), Rambus dynamic random access memory (RDRAM), etc. Examples of a non-volatile mass storage device include, but are not limited to, a hard disk drive, a 3.5-inch diskette, a 5.25-inch floppy diskette, a ZIP® disk (e.g., manufactured by Iomega Corporation of Roy, Utah), a Jaz® disk (e.g., manufactured by Iomega Corporation), an LS-120 Superdisk (e.g., manufactured by Imation° Corporation of Oakdale, Minn.), a rewritable Digital Versatile Disc (DVD-RAM), a Read/Write Compact Disk (CD-RW), a magnetic mass storage device, an optical mass storage device, a magneto-optical mass storage device, a holographic storage device ect. Examples of data stored in a non-volatile memory of a computer include computer instructions (e.g., an operating system, one or more application programs, etc.) and data that is accessed by computer instructions.
When a volatile memory loses power, the data stored on the volatile memory is typically lost. Non-volatile mass storage devices, such as hard disk drives, typically do not lose the data stored thereon when the non-volatile mass storage device loses power (e.g., when power to the computer is turned off, due to a power outage, etc.). Non-volatile memory, however, generally has significantly greater access times for retrieval and storage of data as compared to volatile memory. Non-volatile memory is also typically less expensive than certain volatile memory such as DRAM, SRAM, RDRAM, etc.
In addition to volatile memory and non-volatile memory, a computer typically includes a processor that can perform operations based on instructions and data. Instructions and data to be operated on by the processor can be copied from the slower, non-volatile mass storage device (e.g., a hard disk drive, etc.) to the faster, volatile memory (e.g., a DRAM main memory, an SRAM cache, etc.) because the faster, volatile memory typically has a significantly lesser memory access time than the non-volatile mass storage device. Processor performance and computer performance can be enhanced when memory access times are reduced.
Because the memory access time for a non-volatile mass storage device (e.g., disk drive) is generally greater than the memory access time for the volatile memory (e.g., DRAM main memory, SRAM cache, etc.), the non-volatile mass storage device is often a performance bottleneck. Known disk drives include a volatile cache (e.g., a DRAM cache, an SRAM cache), but such volatile caches are typically part of the disk drive's microcontoller's main memory address space and thereby byte addressed (and not block addressed). In view of the foregoing, it can be appreciated that a substantial need exists for methods and apparatus which can enhance computer system performance.
REFERENCES:
patent: 4908793 (1990-03-01), Yamagata et al.
patent: 4972364 (1990-11-01), Barrett et al.
patent: 5046043 (1991-09-01), Miller et al.
patent: 5070314 (1991-12-01), Decker
patent: 5133060 (1992-07-01), Weber et al.
patent: 5197895 (1993-03-01), Stupecky
patent: 5269019 (1993-12-01), Peterson et al.
patent: 5274799 (1993-12-01), Brant et al.
patent: 5347428 (1994-09-01), Carson et al.
patent: 5353430 (1994-10-01), Lautzenheiser
patent: 5442752 (1995-08-01), Styczinski
patent: 5466629 (1995-11-01), Mihara et al.
patent: 5499337 (1996-03-01), Gordon
patent: 5519831 (1996-05-01), Holzhammer
patent: 5526482 (1996-06-01), Stallmo et al.
patent: 5542066 (1996-07-01), Mattson et al.
patent: 5586291 (1996-12-01), Lasker et al.
patent: 5615353 (1997-03-01), Lautzenheiser
patent: 5636355 (1997-06-01), Ramakrishnan et al.
patent: 5701516 (1997-12-01), Cheng et al.
patent: 5764945 (1998-06-01), Ballard
patent: 5787296 (1998-07-01), Grimsrud et al.
patent: 5787466 (1998-07-01), Berliner
patent: 5806085 (1998-09-01), Berliner
patent: 5860083 (1999-01-01), Sukegawa
patent: 5890205 (1999-03-01), Grimsrud et al.
patent: 5918244 (1999-06-01), Percival
patent: 5963721 (1999-10-01), Shiell et al.
patent: 6012140 (2000-01-01), Thomason
patent: 6023713 (2000-02-01), Grimsrud et al.
patent: 6052789 (2000-04-01), Lin
patent: 6072490 (2000-06-01), Bates et al.
patent: 6101574 (2000-08-01), Kumasawa et al.
patent: 6122711 (2000-09-01), Mackenthun et al.
patent: 6165006 (2000-12-01), Yeh et al.
patent: 6175160 (2001-01-01), Paniccia et al.
patent: 6178479 (2001-01-01), Vishin
patent: 6263405 (2001-07-01), Irie et al.
patent: 6295577 (2001-09-01), Anderson et al.
patent: 6370614 (2002-04-01), Teoman et al.
patent: 0702305 (1996-03-01), None
Ramtron Int'l. Corp.—“FRAM Technology”, Jan. 1994, 2 pages.
NTIS, Dept. of the Navy, “Multi-Wire Cable to Coaxial Cable Transition Apparatus”, ADD000450, Jan. 14, 1974, 8 pages.
RAMTRON Application Note “Replacing a Dallas Semiconductor DS1225 with FRAM® Memory”, Feb. 1994, 2 pages.
News Release, “DPT's SmartCache IV RAID/Caching Kits Outperform Adaptec's SCSI Adapters in Independent Tests and Reviews”, DPT, Aug. 1, 1996.
DPT's products and tech support “FAQ” web page from www.dpt.com as archived by web.archive.com on Jul. 15, 1997.
DPT brochure for Smart IV PM2144W PCI High Performance SCSI Adapter, Cache and RAID upgradable, undated, circa 1997.
Pulvari, “Ferroelectrics and Their Memory Applications”, IRE Transactions-Component Parts, Mar. 1956, pp. 3-11.
Auciello et al, “The Physics of Ferroelectric Memories”, Physics Today, Jul. 1998, pp. 22-27,.
Intel 430HXPCIset Design Guide, Jun. 1997, pp. 1-1 through 6-15.
Moazzami et al, “A Ferroelectric DRAM Cell for High Density NVRAMs”, IEEE Electron Device Letters, vol. 11, No. 10, pp. 454-456, Oct. 1990.
Robertson, “Hyundai Enters Japanese-Dominated FeRAM Market”, a service of Semiconductor Business News, CMP Media Inc., www.siliconstrategies.com; story posted Sep. 3, 1998.
RAMTRON Int'l. Corp., datasheet for FM1608, dated Dec. 7, 1999.
RAMTRON Int'l. Corp. datasheet for FM24C64, dated Dec. 7, 1999.
Merz & Anderson, “Ferroelectric Storage Devices”, Bell Laboratories Record, Sep. 1955, pp. 335-337 and 339-342.
Hodges & Jackson,Analysis and Design of Digital Intergrated Circuits, McGraw-Hill, Inc., 1983, pp. 388-389.
Microsoft Press® Computer Dictionary, 2ndEdition, “nondestructive readout”, 1994, p. 270.
Related U.S. patent application Ser. No. 09/745,550, filed Dec. 26, 2000.
Patent Abstracts of Japan vol. 18, No. 621, Nov. 25, 1994 and JP 06 236241 A (Sharp Corp.) Aug. 23, 1994, Sharp Corp.
Related U.S patent application Ser. No. 09/602,011, filed Jun. 23, 2000.
Related U.S. patent application Ser. No. 09/602,010, filed Jun. 23, 2000.
Related U.S. patent application Ser. No. 09/602,008, filed Jun. 23, 2000.
Related U.S. patent application Ser. No. 09/602,009, filed Jun. 23, 2000.
Tanzawa et al, “A Compact On-Chip ECC for Low Cost Flash Memories”IEEE Journal of Solid State Circuits, IEEE Inc., New York, vol. 32, No. 5, pp. 662-668, May 1, 1997.
Intel, 82371FB (PIIX) and 82371SB (PIIX3) PCI ISA IDE Xcelerator data sheet, pp. 1-122, Apr. 1997.
Diefendorff, Keith, “Intel Tries Integrating Graphics”, In-Stat MDR, Vo. 12, Issue 11 (from www.mdronline.com), Aug. 24, 1998.
Derowitsch, Rachel, “The Quiet Role of Chipsets”,Smart Computing, vol. 9, Issue 8, pp. 70-72, Aug. 1998.
Data sheet—SGS-Thomson Microelectronics GSF32-16×16/90 32 MByte SIMM Flash Memory Module, pp. 1-4, Oct. 29, 1997.
Rosenberg, Jerry M.,Dictionary of Computers, Information Processing&Telecommunications, 2ndEdition, p. 221, 1987.
White, Ron,How Computers Work, Chapter 11, “How a Disk Cache Works”, pp. 71-73, Ziff-Davis Press, Emeryville, CA, 1993.
Intel Corporation
Kenyon & Kenyon
Moazzami Nasser
LandOfFree
Non-volatile mass storage cache coherency apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile mass storage cache coherency apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile mass storage cache coherency apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3261793