Non-volatile magnetic random access memory

Details Non-volatile magnetic random access memory Non-volatile magnetic random access memory

1999-08-13

2001-01-09

Nguyen, Viet Q. (Department: 2818)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S129000, C365S171000

Reexamination Certificate

active

06172902

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to non-volatile high density magnetic random access memory (NVMRAM) storage devices. The invention is more particularly concerned with computer memory, smart cards and other applications of embedded memory, microprocessor controllers, sensors, etc. The invention provides an improved NVRAM with high areal density as well as methods for its manufacture and for writing and reading data therein, and data storage devices incorporating the NVMRAM associated or not with a magnetic write/read recording unit.
BACKGROUND ART
Usual magnetoresistive memory devices (see e.g. Z. Wang, Y. Nakamura, J. of Magnetism and Magnetic Materials 159(1996), 233) such as the GMR memory cell are composed of at least two ferromagnetic layers separated by a non-ferromagnetic layer. For the writing procedure each cell has a word line. By applying a current to the word line, the magnetization of the upper layer can be switched by the induced magnetic field. In order to keep the bottom layer pinned in a given direction, an intermediate non-ferromagnetic layer is inserted between the two ferromagnetic layers allowing magnetic exchange coupling to be avoided. The two magnetic configurations, corresponding to the binary information “1” or “0”, are “1” when both layers are parallel and “0” when the layers are antiparallel. In addition to the word line, for writing, a separate sense line contacting the layers is provided in order to read the magnetic configuration, “1” (parallel=low resistivity) or “0” (antiparallel=high resistivity).
In such known devices, the write and read currents flow in separate word and sense lines, leading to constraints in the architecture, which must be adapted to the structure of the recording unit or logical processing (address of the memory cell, amplification, drivers, etc.), and necessitating also a high word current. Moreover, such known structures are difficult to scale down.
In order to avoid the presence of two line nets (word line and sense line) and to simplify the memory cell architecture, some alternative solutions have been proposed.
One example is a multilayer device described in U.S. Pat. No. 5,695,864, which avoids the need to induce a local field by the word line. This device has a special multilayer configuration and requires a special write stylus.
A second example is a specific spin-valve memory architecture proposed by L. V. Melo et al. (IEEE Trans. on Magnetics 33(1997), 3295) wherein memory bits each made of a spin-valve sandwich stripe are arranged in a matrix. Each bit is addressed with column and row contacts which are connected as a single line via the spin-valve stripe, making a separate word line unnecessary. However, this proposal relates solely to a four-layer system with a specific spin-valve architecture wherein information is stored in a pinned layer perpendicular to the current in the strip. A “1” or “0” is written depending on the direction of the current. With this geometry, demagnetizing fields and high writing currents (of the order of 20 mA) have to be taken into account when scaling down in dimensions. Given that a typical spin-valve stripe measures 4 &mgr;m×1 &mgr;m, there is no prospect of scaling down by several orders of magnitude to achieve a very high areal density.
SUMMARY OF THE INVENTION
The invention aims to provide a non-volatile high density magnetic random access memory storage device incorporating memory cells of deep sub-micron dimensions permitting a very high areal density storage, using a single electric line per bit (or memory cell), operating with a weak electric current amplitude and without the need of particular architecture for the induction of a local field (i.e. without a separate word line), and which allows mass production. Moreover, in contrast to the known devices which are confined to a specific geometry and architecture, the invention aims to provide a non-volatile random access memory storage device that can be integrated in different types of conventional RAM structures and logic silicon-based integrated circuit technology.
The invention is directed to magnetoresistive memory devices using “deep” sub-micron wires termed “nanowires”. Nanowires are characterized by the nanometer size of the wire diameter and a micrometer scale in length. The technique of electrodeposition in track-etched membrane templates allows the mass production of arrays of 10
6
to 10
8
parallel nanowires per cm
2
(up to some Gbit/Inch
2
) of 6000 nm length and down to 10 nm diameter (“A New Method to Construct Nanostructured Materials of Controlled Morphology”, B. Doudin, J-Ph. Ansermet,
Nanostructured Materials
, vol. 6, 521-524 (1995)). Nanowires can also be produced by microlithography or by a combination of techniques.
To date nanowire technology has been the subject of much fundamental research and there have been proposals for use as optical filters, but no practical applications have yet been developed.
The invention is based on the insight that a single nanowire of ferromagnetic or ferromagnetic
ormal-metal multilayers or ferromagnetic/junction/ferromagnetic with a contact on the top and on the bottom can be used as a non-volatile memory cell unit. Two well defined magnetic states can be differentiated in the nanowire and read-out non-destructively with a low electric current. Moreover, the magnetic state can be changed by the action of a pulsed current.
The invention makes use of an array of nanowires (or dots) deposited in a membrane by electrodeposition and/or vacuum deposition and/or lithographic techniques, in order to exploit both the simplification of the structure of the basic memory cell and the intrinsic magnetic and mechanical properties.
The invention concerns a non-volatile random access memory (NVRAM) of the type comprising a plurality of magnetoresistive memory elements connected by sets of non-intersecting conductor sense lines. These non-intersecting conductor sense lines define the address of each memory element and are connectable to a magnetic write/read recording unit for writing and reading the magnetic state (“0”, “1”) of each memory element by passing current in its conductor sense lines.
According to the invention, the memory elements are a plurality of magnetoresistive submicron dots or wires embedded in a membrane of electrically non-conductive material through which the submicron dots or wires extend. The sets of non-intersecting conductor sense lines are connected to the opposite ends of the submicron dots or wires on opposite sides of the membrane. Each magnetoresistive submicron dot or wire is composed of ferromagnetic material or a combination of ferromagnetic and non-ferromagnetic material having at least two magnetic states (“0”; “1”), writeable by passing a writing current pulse in its conductor lines sufficient to switch its magnetic states and readable by passing a current in its conductor lines below the level for switching its magnetic states. For writing and/or reading an appropriate external magnetic field is applied.
In the NVRAM of the invention, magnetoresistive effects of nanowires and dots are used for reading a binary magnetic state and pulsed electric current is used for writing by modifying the magnetic state, thereby avoiding the need to use a multilayered structure and avoiding constraints in the geometry adapted for the induction of a local magnetic field. Both reading and writing processes are performed by using the same electric line, simplifying the architecture.
The submicron dot or wire is usually made of ferromagnetic material, of ferromagnetic
on-ferromagnetic or metal/ferromagnetic multilayers or a ferromagnetic/dielectric/ferromagnetic junction having the required magnetoresistive properties.
Preferably the submicron dots or wires—which constitute the magnetic unit—have a diameter ranging from 10 to 100 nm and a length from 200 to 10,000 nm. For a wire diameter of about 80 nm, the spacing between the dots or wires (i.e. the spacing of the conductor sense lines) could be about 150 to 250 nm. With a spac

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