Non-volatile magnetic memory

Static information storage and retrieval – Systems using particular element – Magnetic thin film

Reexamination Certificate

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C365S173000, C365S158000

Reexamination Certificate

active

06795340

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a non-volatile magnetic memory using a tunnel magnetic resistor and a method for reading its information.
2. Description of the Related Art
A non-volatile magnetic memory using a Tunnel Magnetic Resistor (TMR) as a memory element is called as a Magnetic Random Access Memory (MRAM).
FIG. 1
is a schematic view showing one example of a structure of TMR. In this example of TMR, an insulating film
2
having a thickness of about 2 nm is provided on a ferromagnetic film of a pin layer
3
having a thickness of about 20 nm. Further, a ferromagnetic film of a free layer
4
having a thickness of about 20 nm is provided on the insulating film
2
. A direction of the magnetization in the pin layer
3
is fixed, and “1” or “0” is determined by use of a characteristics that the tunnel current is changed by the fact that a direction of magnetization in the free layer
4
is same direction (parallel) or the opposite direction (nonparallel) to that in the pin layer
3
, that is a change in the resistance value.
Further, as shown in
FIG. 2
, electric current is respectively passed through a first wiring
14
and a second wiring
15
intersecting to each other, which were provided on and below the TMR
1
and the magnetization direction of the free layer
4
is inverted by a combined magnetic field produced by the current on the TMR
1
so that information of “1” or “0” can be written. For example, assuming that an easy axis
8
of magnetization in the TMR
1
is a direction of X in
FIG. 2
, when a direction of the second electric current
17
passed through the second wiring
15
extending to the direction of Y is a negative direction in the Y axis, writing of “1” can be performed on the other hand, when the direction of the second electric current
17
is a positive direction, writing of “0” can be performed. In the case of this example, the first electric current
16
in the first wiring
14
extending to the direction of X may be passed to any direction with respect to the X-axis.
FIGS. 3A and 3B
show an example of a memory cell using a TMR. A one side terminal of TMR
1
is connected to a bit line
11
and the other side terminal is connected to a transistor
6
. The selection of the cell is carried out by applying high voltage to a reading word line
13
to turn the transistor
6
ON (on electrical continuity conditions). Here, when an arbitrary voltage is applied to a bit line
11
, different current is passed from the bit line
11
to Gnd through TMR
1
on the conditions of “1” or “0”. By measuring this current a reading operation is performed. A write operation is performed by making the transistor
6
off (electrical non-continuity conditions) and passing current to a writing word line
12
and the bit line
11
respectively. In this example of the memory cell, the bit line
11
is used in writing and reading in common. However, since TMR
1
is connected to the transistor
6
the word line is distributed to the writing word line
12
and the reading word line
13
. As shown in
FIG. 3B
, since the writing word line
12
must be placed just below (or just above) TMR
1
, a leading wiring
7
is required to connect the transistor
6
formed on a Si substrate with TMR
1
.
FIG. 4
is a configuration of a MRAM described in “2000 IEEE International Solid-State Circuits Conference pp 128-129”. In this example, memory cells shown in
FIGS. 3A and 3B
are arranged in a matrix to form a cell array. Two adjacent memory cells on a word line are set to one unit cell
5
and this example is characterized in that information is complementarily read from or written in the respective TMRs in the unit cell
5
. It is noted that an easy axis
8
of magnetization in each TMR is parallel to the direction of the word line. For example, when writing to the unit cell
5
is performed, a reading word line
13
a
is made low and transistors
6
a
,
6
b
are turned off, and electric current is passed through a writing word line
12
a
in an arbitrary direction and at the same time electric current is passed through a bit line
11
a
and a bit line
11
b
in different directions respectively so that complementary writing is carried out. The read operation is carried out by setting the reading word line
13
a
to a high mode, turning the transistors
6
a
,
6
b
on, selecting the bit lines
11
a
,
11
b
with a Y selector
21
to connect it to a read circuit
22
, and applying the same voltage to the bit line
11
a
and the bit line
11
b
to detect the difference of current passed thorough TMRs
1
a
,
1
b.
FIGS. 5A and 5B
shows another example of a memory cell using a TMR. One side terminal of TMR
1
is connected to a word line
10
and the other side terminal is connected to a bit line
11
. Here, an easy axis
8
of magnetization in TMR
1
is parallel to the direction of the word line. Then writing to a cell is carried out by passing electric current
16
through the word line
10
in an arbitrary direction, and passing electric current
17
through the bit line
11
in a positive direction or a negative direction with respect to the direction of Y-axis in accordance with information to be written. Further, reading is carried out by applying arbitrary fixed voltage to the word line
10
and the bit line
11
and detecting values of current
23
passing through TMR
1
. In this example of the memory cell the word line
10
and the bit line
11
are used in reading and writing in common.
FIG. 6
is a configuration of a MRAM described in a prior reference “Applied Phisics Letters Vol. 77 Num. 13, 2000. 9. 25”. In this example, a memory cell shown in
FIGS. 5A and 5B
is defined as a unit cell
5
, and the unit cells
5
are arranged in a matrix to form a cell array. Here, the easy axis of magnetization in each TMR is parallel to the word line. Then writing to the cell
5
is carried out by passing electric current through a word line
10
a
in an arbitrary direction, and at the same time by passing electric current through a bit line
11
a
in a positive direction or a negative direction with respect to the direction of Y-axis in accordance with information to be written. Reading of information written in the cell
5
is carried out as follows. First, an arbitrary voltage V
1
is applied to the word line
10
a
and 0 V is applied (connected to Gnd) to other word lines
10
b
and
10
c
other than the word line
10
a
. Then the bit line
11
a
is connected to a read circuit
22
and 0 V is applied (connected to Gnd) to the bit lines
11
b
and
11
c
other than the bit line
11
a
. At that time the bit line
11
a
is a virtual earth terminal and the voltage
10
of the bit line
11
a
becomes 0 V. A voltage of V
1
is applied across TMR
1
a
and electric current
23
according to information stored in the cell
5
flows in the bit line
11
a
so that the current is input into the read circuit
22
.
The read circuit
22
reads information with a self-reference system in which the information in the cell
5
is read twice and a current value read first is compared with a read current value of the second known information as shown in FIG.
7
.
A transistor is added to each TMR in MRAM of
FIG. 4
shown as a conventional example. Thus, since the selectivity of the cell is excellent and current flowing in TMR is read by complementation (difference), signal is doubled. However, since these transistors can be mounted on only Si substrate, a leading wiring
7
shown in
FIG. 3B
is needed and the cell size is not decreased. Further, these transistors are arranged in the cell array and no peripheral circuits such as a selector, a read circuit and the like can be arranged. Even if the scaling of the TMR size is advanced, the cell size is restrained by the design rule of the base elements including a transistor. Further, the presence of this leading wiring
7
increases the distance between the writing word line
12
and TMR
1
. Since magnetic fields
18
,
19
produced by the write current on TMR
1
is inversel

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