Non-volatile latch with magnetic junctions

Static information storage and retrieval – Systems using particular element – Magnetic thin film

Reexamination Certificate

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Details

C365S225500, C365S158000, C365S189050

Reexamination Certificate

active

07082053

ABSTRACT:
A memory storage circuit is provided which includes a plurality of magnetic elements each configured to store bits in a first or a second logic state. The storage circuit may further include a plurality of transistors coupled to at least two of the magnetic elements. Such a plurality of transistors may be collectively configured to store bits in the first and second logic states as well. The memory storage circuit may include circuitry configured to load bits from a set of the magnetic elements into the plurality of transistors. Another circuit is provided which includes a magnetic element interposed between a bit line and an electrode. The circuit may further include a first set of circuitry configured to induce current flow through the magnetic element in a direction from the electrode to the bit line. A method for operating a memory storage circuit with the aforementioned configurations is also provided.

REFERENCES:
patent: 6147922 (2000-11-01), Hurst, Jr. et al.
patent: 6175525 (2001-01-01), Fulkerson et al.
patent: 6178111 (2001-01-01), Sather et al.
patent: 6542000 (2003-04-01), Black et al.
patent: 6914845 (2005-07-01), Ooishi
patent: 102 11 337 (2003-10-01), None
patent: 80/01965 (1980-09-01), None
International Search Report, PCT/US2004/042559, mailed Apr. 6, 2005.

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