Non-volatile ferroelectric memory device with leakage preventing

Details Non-volatile ferroelectric memory device with leakage preventing Non-volatile ferroelectric memory device with leakage preventing

1995-08-04

1997-03-25

Nguyen, Viet Q.

Static information storage and retrieval

Systems using particular element

Ferroelectric

365117, 36518909, G11C 1122

Patent

active

056151446

ABSTRACT:
A non-volatile ferroelectric memory device includes a plurality of memory cells provided in a matrix manner, each of which comprises a transistor having a gate and source and drain regions formed in a semiconductor region, and a ferroelectric capacitor having first and second electrodes and a ferroelectric layer interposed between the first and second electrodes. The second electrode is connected to one of the source and drain regions of the transistor. The memory device further includes a plurality of pairs of bit lines, each of the bit lines of each of the pairs being connected to the other of the source and drain regions of the transistor of each memory cell in a column of the plurality of memory cells, a plurality of word lines each of which is connected to the gate of the transistor of each memory cell in a row of the plurality of memory cells, a plate potential section for generating a first predetermined potential intermediate between a reference potential and a high DC voltage and supplying the first potential to the first electrode of each of the plurality of memory cells, a well potential section for generating a second predetermined potential lower than the first potential with respect to the reference potential and supplying the second potential to the semiconductor region of each of the plurality of transistors, and a sense amplifier section for sensing a data using potentials on the bit lines of each of the plurality of pairs of bit lines. The well potential section functions as a preventing section for preventing a leakage current from flowing from the ferroelectric layer.

REFERENCES:
patent: 4888630 (1989-12-01), Paterson
patent: 5345415 (1994-09-01), Nakao et al.
patent: 5414654 (1995-05-01), Kubota et al.
patent: 5515312 (1996-05-01), Nakakuma et al.
T. Sumi et al., "A 256kb Nonvolatile Ferroelectric Memory at 3V and 100ns", 1994 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 268-269.

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