Non-volatile, electrically erasable and reprogrammable memory el

Static information storage and retrieval – Read/write circuit – Erase

Patent

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Details

365103, 365174, G11C 1140

Patent

active

043995233

ABSTRACT:
The invention relates to non-volatile electrically erasable and reprogrammable memories produced by CMOS technology.
According to the invention, each memory element comprises only a single p-channel transistor having a polycrystalline silicon floating gate capacitively coupled to a control electrode. The thicknesses of injection oxide and gate oxide are such that the element can be programmed by avalanche of the drain-substrate junction and erased by field emission of electrons from the floating gate towards the substrate.
All the voltages required can be generated on the circuit of the memory from a battery voltage of 1.5 volts.

REFERENCES:
patent: 4209849 (1980-06-01), Schrenk

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