Non-volatile dynamic random access memory

Details Non-volatile dynamic random access memory Non-volatile dynamic random access memory

1994-10-20

1996-01-30

Zarabian, A.

Static information storage and retrieval

Read/write circuit

Data refresh

365228, G11C 700

Patent

active

054885876

ABSTRACT:
The presently claimed NVDRAM including: volatile memory cells which require a refreshing operation; non-volatile memory cells; an address generation circuit for automatically generating in sequence respective addresses; a self-refresh circuit; a refresh timing circuit; a self-store starting circuit for determining whether the duration of the refreshing operation as measured by the refresh timing circuit has exceeded the predetermined time amount; a self-store circuit for, when the duration of the refreshing operation has exceeded the predetermined time amount, stopping the refreshing operation as measured by the refresh timing circuit and for sequentially transferring the content stored in the volatile memory cells to the non-volatile memory cells to be stored therein based on the addresses generated by the address generation circuit.

REFERENCES:
patent: 4747082 (1988-05-01), Minato et al.
patent: 4827453 (1989-05-01), Sawada et al.
patent: 5189641 (1993-02-01), Arakawa
patent: 5197026 (1993-03-01), Butter
patent: 5396461 (1995-03-01), Fukumoto
Fukumoto, K., et al., "A 256K-bit non-volatile PSRAM with page recall and chip store" 1991 Symposium on VLSI Circuits, Digest of Technical Papers (May 30-Jun. 1, 1991) pp. 91-92.
Evans, J. T., et al., "An experimental 512-bit nonvolatile memory with ferroelectric storage cell" IEEE J. Solid-State Circuits (1988) 23(25):1171-1175.
Moazzami, R., et al., "A ferroelectric DRAM cell for high-density NVRAM's" IEEE Electron Device Lett. (1990) 11(10):454-456.

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