Static information storage and retrieval – Floating gate – Multiple values
Patent
1995-12-20
1997-02-25
Nelms, David C.
Static information storage and retrieval
Floating gate
Multiple values
365 45, 36515529, G11C 1134
Patent
active
056065221
ABSTRACT:
An analog memory includes a cell array, a comparator, a mode selector, and a controller. The cell array includes a plurality of memory cells each having a control gate an injector, and a floating gate, and a first input part of a differential input stage. A first high-voltage pulse signal is applied to the control gate and a second high-voltage pulse signal is applied to the injector. Charges are injected into or are erased from the floating gate through the injector. The comparator has a differential input port whose first input is a reference voltage signal and whose second input is a floating gate voltage signal of one of the plurality of memory cells. The comparator compares and outputs the difference between the reference voltage signal and the floating gate voltage signal. The mode selector connects the output of the comparator to the first input, functions as a unit amplifier during a reading mode, and connects the external reference voltage signal to the first input of the comparator during a writing mode. The controller maintains a program enable state if the current state of the comparator output signal is the same as its previous state and maintains a program disable state if the current state is different from the previous state. The controller generates first and second high-voltage pulse signals according to the state of the comparator output signal. The analog memory reduces the programming voltage, allows for fast programming operations, and increases memory life.
REFERENCES:
patent: 5028810 (1991-07-01), Castro et al.
"A Non-Volatile Analog Storage Device Using EEPROM Technology," by Trevor Blyth, Sakhawat Khan, and Richard Simko. 1991 IEEE International Solid-State Circuits Conference, Feb. 1991.
"An Analog Trimming Circuit Based on a Floating-Gate Device," by Eduard Sackinger and Walter Guggenbuhl. IEEE Journal of Solid-State Circuits, vol. 23, No. 6, Dec. 1988.
"Trimming Analog Circuits Using Floating-Gate Analog MOS Memory," by L. Richard Carley; IEEE Journal of Solid-State Circuits. vol. 24, No. 6, Dec. 1989.
"Floating Gate MOSFWET With Reduced Programming Voltage," by Y.-Y. Chai and L. G. Johnson; Electronics Letters, 1st Sep. 1994, vol. 30 No. 18.
Hoang Huan
Nelms David C.
Samsung Electronics Co,. Ltd.
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