Non-vital loads

Details Non-vital loads Non-vital loads

2001-06-12

2003-12-23

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S119000, C711S118000

Reexamination Certificate

active

06668306

ABSTRACT:

FIELD OF THE INVENTION
This invention pertains to carrying out load instructions in a computer, and more particularly to carrying out load instructions in a timely manner.
BACKGROUND OF THE INVENTION
When a computer program executes, it typically needs to process data stored in main memory. Such data are retrieved from main memory via a load instruction. In early microprocessors, when a load instruction was executed, the program would wait until the load instruction finished before executing the next instruction. Since accessing data from main memory is generally a slow proposition relative to executing other instructions, waiting for the load instruction to complete before continuing to execute the program slowed down program execution.
More recently, microprocessors have been developed that improved instruction processing. Parallel execution of program instructions and pipeline processors, to name two examples, improve program execution by enabling other instructions to execute (at least in part) while the load instruction is being executed.
Current technology uses multi-banked or multi-ported memories to increase performance. But multi-banked memories may have bank conflicts, making multi-ported memories less efficient than comparably-sized multi-ported memories. And multi-ported memories are hard to implement, leading to increased complexity and latency.
Currently, all load instructions are treated equally. Load instructions loading data from main memory that are never actually used by the program are loaded in the same manner as load instructions bringing in data vital to program execution. Microprocessors do not consider the use of the data or the time at which the data are needed in executing the load instructions.
The present invention addresses this and other problems associated with the prior art.


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